Integrated circuits on a semiconductor circuit substrate are often constructed in housings consisting at least of a semiconductor chip, a so called leadframe and a compound. In common production methods, first, the semiconductor chip is mechanically mounted on a chip island within the leadframe, wherein the semiconductor chip is additionally electrically bonded to a carrier board, such as a PCB, via a leadframe. For that purpose, a leadframe has several pins isolated from each other, wherein electric bonding between the pins of the leadframe and the corresponding terminal contacts is normally provided on a semiconductor chip via bonding. In order to protect the semiconductor chip and the bonding wires from adverse environmental influences, normally, the semiconductor chips and part of the leadframe are encapsulated with a compound, so that merely parts of the pins which are used for bonding with a board protrude from the compound material.
Thus, also from a mechanical point of view, a completely housed semiconductor chip is a complex construct consisting of different materials. Due to the different thermal extension coefficients of these materials, the individual components strain heavily against each other, wherein these strains can already occur during production. Thus, the surface of the semiconductor chip within the housing is under significant compressive/tensile stress in the order of 100 MPA. Additionally, these mechanical strains change with environmental conditions, such as temperature, air humidity or also through further processing of the member, such as cutting the member from the leadframe strip (typically at the semiconductor producer) or soldering the membrane to a carrier board in a module (mostly at the module producer). As an alternative to soldering the member, other bonding methods, such as overmolding, hot forming, or bending the pins are possible, which also apply mechanical stress on the member. Due to the above-described effects, the mechanical strain at the semiconductor is badly defined and not very constant.
Particularly, the mechanical strain of the semiconductor influences important parameters of members integrated in semiconductor circuit substrates, which is known in the art, for example, as piezo-resistive, piezo-MOS, piezo-Hall and piezo-junction effect. Particularly ultra precise analog semiconductor circuits—and here particularly sensors—are suffering from the fact that their offset or their sensitivity (e.g. the gain factor of an amplifier, the magnetic sensitivity of a magnetic field sensor, the output voltage of a voltage constant or the temperature code of a digital temperature sensor).
The piezo-effects on electric parameters of semiconductor circuits, which are significant for understanding the inventive thought, will be briefly described below.
Generally, a mechanical strain in a semiconductor material has the effect that the properties of the charge carriers change with regard to the charge carrier transport, such as the charge carrier mobility, the mean collision time, the scattering factor, etc.
Thereby, the piezo-resistive effect indicates generally how the specific ohmic resistance of the respective semiconductor materials behaves under the influence of a mechanical strain. Changes of the characteristic curves of diodes and bipolar transistors result, among others, from the piezo-junction effect. The piezo-Hall effect describes the dependence of the Hall constant of the semiconductor material on the mechanical strain state in the semiconductor material. The piezo-tunnel effect occurs at reverse-operated highly doped shallow lateral p-n junctions. This current is dominated by band-to-band tunnel effects and also stress-dependent.
The piezo-resistive effect and the piezo-MOS effect that can sometimes be found in literature can be classified comparably, since the mobility of the charge carriers in the MOS channel of a MOS field-effect transistor changes under the influence of mechanical stress in the semiconductor material of the integrated circuit chip with the Piezo-MOS effect in the same way as with the piezo-resistive effect.
Thus, it becomes clear that the electric or electronic characteristics of the integrated circuitry can be altered due to mechanical strains in the semiconductor material of an integrated circuitry, wherein then a decrease in performance of the integrated circuitry can be observed, for example in the form of an impairment of the dynamic range, the resolution, the bandwidth, the power consumption or the accuracy, etc.
In particular, the above-mentioned piezo-resistive effect indicates how the specific ohmic resistance ρ of the respective semiconductor material behaves under the influence of a mechanical stress tensor σ and the piezo-resistive coefficient π:ρ=ρ0(1+Σπi,jσi,j)Thereby, the factor ρ0 is the basic value of the specific resistance, which remains uninfluenced by the mechanical strain.
In integrated circuits (ICs), a required current I, e.g. a control current, a reference current, etc., may be normally generated by circuit elements of the integrated circuit on the semiconductor chip. Thereby, substantially, a defined voltage U is applied to an integrated resistor with the resistance R and the current I flowing then is coupled out. Thus, generally, a current I can be generated at any resistive element, e.g. also at an MOS field-effect transistor, which is in the linear operating range.
The voltage U can be generated, for example, relatively constant by known bandgap principles with regard to mechanical strains in the semiconductor material (despite comparatively small piezo-junction effects on the generated bandgap voltage). However, the resistance R is subject to the piezo-resistive effect according to the above equation:R=R0(1+Σπi,jσi,j)Thereby, the factor R0 is the basic value of the resistance, which remains uninfluenced by the mechanical strains, and the value πij is a piezo-resistive coefficient. Thus, the current I generated at the resistive element can be expressed as follows:I=U/R=U/(R0(1+Σπijσij))
The piezo-Hall effect describes the dependence of the Hall constant Rh on the mechanical stress state in the semiconductor material, with:Rh=Rh0(1+ΣPi,jσi,j)Thereby, σij is the mechanical stress tensor, Pij are the piezo-Hall coefficients, summing is performed via i,j=1 . . . 3.
Both the piezo-resistive effect and the piezo-Hall effect are spurious during the operation of an integrated circuit, particularly a sensor circuit, such as an integrated Hall probe including control and evaluation electronic.
The piezo-Hall effect, which also occurs due to mechanical strains in the semiconductor material of the semiconductor chip of the integrated circuit, changes, for example, the current-related sensitivity Si of the Hall probe as follows:
      S    i    =                    U        h                              I          H                ⁢        B              =                            R          h                t            ⁢      g      Thereby, Uh is the Hall voltage at the output side of the Hall probe, IH is the current (control current) through the Hall probe, B is the magnetic flow density to be detected, t is the effective thickness of the active layer of the Hall probe and g is a geometry factor describing the influence of the contact electrodes on the Hall voltage.
As additional complication, the Hall current IH through the Hall probe changes due to the piezo-resistive effect, when mechanical strains are applied in the semiconductor material of the Hall probe array, when the Hall current IH (control current) is defined, for example, across an integrated resistor R, where a voltage U is dropped, for example via a locked loop. Thus, a change of the Hall current IH due to a resistor change caused by the piezo-resistive effect leads to a change of the sensitivity S of the Hall probe, the sensitivity S of the Hall probe is the product of current-related sensitivity Si and Hall current IH:S=SiIH=Uh/B∝Si/RThe magnetic sensitivity S of the Hall probe defines (as indicated above) the relation of the output voltage UH of the Hall probe to the influencing magnetic field component B.
A mechanical strain σij in the semiconductor material of the Hall probe arrangement influences the current-related magnetic sensitivity Si of a Hall probe according to:Si=Si0(1+ΣPijσij)Here, the factor Si0 is the basic value of the current-related magnetic sensitivity, which remains uninfluenced by the mechanical strain, and the factor Pij is a piezo-Hall coefficient.
Generally, an attempt is made to maintain the magnetic sensitivity S of a Hall probe as constant as possible, wherein particularly influences based on mechanical strain due to the above described piezo-resistive effects and the piezo-Hall effects are spurious.
With regard to the above-described piezo-effects, it should be noted that the coefficients σij, Pij and πij describing the mechanical strains occurring in the semiconductor material are elements of tensors, i.e. that the current-related magnetic sensitivity Si of a Hall element and the resistance R of a resistive element do not change only by the strength of the mechanical strain in the semiconductor material but additionally in dependence on the strain direction in the semiconductor material. The distinct directional dependence of the influence of a mechanical strain in the semiconductor material on electric and electronic parameters of an integrated circuit are known in the art.
Since the piezo-effects are directional, as described above, which means they depend on the relative orientation of a semiconductor element with regard to the crystal structure of a semiconductor substrate, the crystallographic orientations relevant in the production of integrated semiconductor circuits will be described below.
For producing integrated circuits, the semiconductor wafers, e.g. silicon wafers or silicon slices, respectively, are sawn from a single crystal rod, such that the wafer surface is associated to a crystallographic plane. In order to determine the respective plane in a cubic crystal, the so called “Miller indices” are used, which are indicated below in round brackets. FIG. 3a shows, for example, a top view of a semiconductor wafer which is cut in the (100) plane.
Further, the major crystallographic directions in the wafer plane are indicated in FIGS. 3a-b, wherein the producers of these silicon wafers provide a so-called “primary flat” at the silicon slice. Normally, the edges of the square geometries of the circuit structures run on the semiconductor chip in parallel or perpendicular, respectively, to the primary flats. In FIG. 3a, particularly, the crystallographic directions or axes, respectively, are illustrated in the plane of the semiconductor wafer, wherein the same are illustrated below in square brackets. The coordinate system is usually used such that the [100] direction runs perpendicular to the primary flat, while the [ 111] direction runs parallel to the primary flat. The directions [010] and [100] run in an angle of +/−45° to the [110] direction.
Further, an angle φ is defined with respect to the [110] direction, wherein in the top view on the wafer surface, the angle φ is counted counter-clockwise starting from the [110] direction. Normally, the individual chips at the wafer are positioned such that the directions φ=0° and φ=90° correspond to the IC vertical or horizontal direction, respectively, wherein these directions can be exchanged, depending on whether the IC is on edge or horizontal. Further, the direction φ=90° will be designated below as x-axis ([ 110] direction) and the direction φ=0° as negative y-axis ([110] direction).
Since {100} silicon material is used in the plurality of applications for integrated semiconductor circuits, the following explanations mainly relate to the numbers for {100} silicon material, which are relevant for this material, in order to simplify the explanations and due to the specific practical importance. However, it should be clear that other semiconductor materials or other silicon materials can also be used.
Since an integrated circuit chip is generally structured in a layered way in the housed state, the description can be limited to a planar stress state, namely two normal stress components σxx, σyy and one shear stress component σxy, as illustrated exemplarily with regard to FIG. 3b. Here, according to definition, the x and y axes are arranged in parallel to the edges of the semiconductor circuit chip. The other stress components are substantially negligibly small and have only little influence on the electric circuit components. In a sufficiently high distance to the edge of the semiconductor circuit chip and particularly in the middle of a semiconductor circuit chip, the shear stress component σxy is also mostly negligibly small. Thus, substantially, only the two normal stress components σxx and σyy remain.
According to the above definition, in the mostly used {100} silicon semiconductor material, the x-axis is parallel to the [ 110] direction, and the y-axis is parallel to the [ 110] direction.
The electronic function parameters of different integrated devices or semiconductor devices, respectively, show the dependences on the above illustrated normal stress components σxx and σyy in {100} silicon, which will be discussed in detail below.
In the following, first, resistive elements, such as resistor elements, MOS-FETs, etc. and particularly the influence of the piezo-resistive effect on the resistance of a resistive element will be discussed.
If the mechanical stress σ on the semiconductor chip changes, the resistance changes also due to the piezo-resistive effect according to the following equation:
      δ    ⁢                  ⁢    R    =                    Δ        ⁢                                  ⁢        R            R        =                            R          ⁡                      (            σ            )                          -                  R          ⁡                      (                          σ              =              0                        )                                      R        ⁡                  (                      σ            =            0                    )                    The alignment of a resistor element on the semiconductor chip is indicated as angle φ in relation to the [110] direction in the crystal. Here, the [110] direction is perpendicular to the primary flat of the semiconductor wafer and thus clearly defined (see FIG. 3a).
If two resistors, normally of the same size but rotated by 90° in the layout, are connected in series, the stress dependence can be reduced. The same applies for connecting two resistors rotated by 90° in parallel.
It can be shown that the series connection of two resistors with orthogonal layout is independent of a rotation of the whole arrangement by +/−45° with regard to mechanical strains. Such an arrangement will be referred to as “L-layout” below. The resulting resistor of the arrangement is even independent of the angle φ.
In summary, it can be said with regard to diffusion or implantation resistors, respectively, on the semiconductor circuit chip, that the stress-dependence of the resistance depends on the orientation of the resistor in the xy plane of the semiconductor circuit chip depends, so that particularly a resistor is not only sensitive to the sum of the normal stress components.
Alternatively, a so called L-resistor arrangement of two resistors can be provided, i.e. two resistors of the same size, which are arranged perpendicular and immediately adjacent to each other, are connected electrically in series or in parallel. Here, the L-resistor circuit can be rotated in any way in the (100) plane without any changes of its piezo-properties or dependences, respectively. This L-resistor circuit is preferred compared to a single resistor in a (100) direction, since the L-resistor circuit is substantially the only one being insensitive to the shear stress component in the semiconductor material of the semiconductor circuit chip.
For a stress dependence of an L resistor circuit, the following relation results:
      R    L    =                    R                  L          ⁢                                          ⁢          0                    ⁡              (        T        )              ⁢          (              1        +                                                                              π                  11                                ⁡                                  (                  T                  )                                            +                                                π                  12                                ⁡                                  (                  T                  )                                                      2                    ⁢                      (                                          σ                xx                            +                              σ                yy                                      )                              )      Here, the factor RL0(T) indicates the resistance of the L resistor circuit at miniscule mechanical stress in the semiconductor material of the semiconductor circuit chip. In this context, it should be noted that the basic resistance RL0(T) is already temperature-dependent. In an L resistor arrangement in the (100) plane, factors π11(T) and π12(T) are the only relevant terms of the piezo-resistive tensor. These two relevant terms of the piezo-resistive tensor also show a certain temperature-dependence.
With regard to the piezo-resistive effect, a special form of resistor elements, namely polysilicon resistors, will be discussed. Polysilicon resistors are not simply diffused or implanted, respectively, into the single crystal material of the semiconductor circuit chip, but are grown on the semiconductor surface of the integrated semiconductor chip. Thereby, generally, a dielectric lies between the single-crystal semiconductor material and the polysilicon trace of the polysilicon resistor. Now, the stress dependence of polysilicon resistors depends no longer on the direction of the polysilicon resistor trace on the semiconductor surface, due to the statistic directional distribution of the many single grains in the poly-semiconductor material (polysilicon material). Thus, a polysilicon resistor shows a substantially similar piezo-resistive dependence as an L-resistor circuit of diffusion or implantation resistors, respectively.
In the following, the influence of mechanical strains in a semiconductor material on the Hall-constant in the semiconductor material will be discussed, wherein this dependence will be described through the piezo-Hall effect. Particularly the current-related magnetic sensitivity Si of a Hall probe is influenced by the piezo-Hall effect, due to mechanical strain σ in the semiconductor material of the semiconductor circuit chip, according to the following equation:Si=Si0(1+P×σ).
By considering a planar stress state in the semiconductor chip of a Hall probe and by neglecting the shear stress component, while the Hall probes are sufficiently distant from the edge of the semiconductor circuit chip, so that according to the invention only the two normal stress components σxx, σyy may be required for describing the mechanical stress tensor, the following current-related magnetic sensitivity Si of a Hall probe results:Si=Si0(T)(1+P12(T)(σxx+σyy))In the above equation, the factor Si0(T) represents the current-related magnetic sensitivity in a miniscule mechanical stress, wherein it should be noted here as well that the basic value of the Si0(T) is already temperature-dependent. Here, the factor P12(T) indicates the only relevant coefficient term of the piezo-Hall tensor, which again has a certain temperature dependence. Thus, even with a Hall probe in a semiconductor circuit chip, it results that only the sum of the two normal stress components σxx and σyy enters the above equation for the current-related magnetic sensitivity Si of a Hall probe.
Apart from Hall probe arrangements, there are other magnetic field sensors, such as MAG FETs or magneto diodes, wherein all these elements have the same property in that, through the Hall effect, the charge carriers flowing through the magnetic field sensor element in the semiconductor material are influenced by a magnetic field. All stated elements have piezo-influences, which are described by the piezo-Hall coefficient or similar coefficients, i.e. the influence of mechanical strains in a semiconductor material on the above-mentioned magnetic field sensitive elements is not described by the piezo-resistive effect alone.
In order to correct the above-described piezo-effects, which influence the read-out accuracy of semiconductor sensors, such as Hall sensors, a range of approaches and concepts exist in the prior art.
International patent application WO 2003040852-A2 describes a system, which detects mechanical stress acting on the semiconductor circuit substrate, wherein this stress influences a useful signal (particularly a magnetic field sensor). The mechanical stress directly measured at the chip is evaluated by a processing means, which influences the useful signal based on the detected mechanical stress and thus realizes a piezo-compensation. Thus, the method is based on directly measuring the mechanical stress acting on the semiconductor chip and to derive the influence which the measured stress has on the semiconductor sensor via a known function from the measured stress, so that the signal measured from the semiconductor sensor can be corrected by the predicted stress component.
European patent application 1 496 344 A2 describes how signals are generated with resistor Ls of two different conductivity types (n- and p-doping), which can be combined to an overall signal by appropriate weighting and summing/subtraction, which has a predeterminable dependence on mechanical stress (and particularly can also be stress-independent). The principle is to combine two resistors, which have been produced in different technology, namely an n- and a p-doped resistor, and which consequently have different piezo-resistive properties, such that a signal generated via both resistor types either forms a temperature-independent stress signal or represents a stress-independent temperature signal. Here, additionally, the two resistor types are formed by two subresistors of the same technology connected in series or in parallel, so that the overall resistor formed of the two subresistors is merely piezo-sensitive to the normal component of the mechanical stress.
Under the assumption that the two resistors of different conductivity types behave with regard to their electric properties as shown by literature values, a temperature-dependent stress signal or a stress-independent temperature signal can be generated by a different combination of the two subsignals. Further, EP 1 496 344 A2 describes that a resistor configuration whose piezo-properties only depend on the sum of normal stresses, can also be generated by forming so called “Van Der Pauw” structures on the semiconductor. The basic mode of operation of the Van Der Pauw structures is that a resistor element is operated in a clocked way, wherein the current flow is controlled such that in a first clock, the current flow is primarily generated in a first direction by the Van Der Pauw structure, wherein the first direction is perpendicular to a second direction, which indicates the primary current direction in the second clock. If the resistor, as it is measured in two subsequent clock periods, is averaged, the same will only depend on the sum of the normal stress components in the chip plane.
The usage of Van Der Pauw structures is also proposed in DE 102 23 179 A1, wherein the invention described therein aims to provide a semiconductor structure whose stress sensitivity has the same directional dependence like a semiconductor sensor to be stress-compensated, particularly like a Hall sensor, so that the semiconductor structure described therein is also sensitive to the normal stress components of the stress.
The German patent application DE 101 54 497 A1 describes also how integrated semiconductor resistors can be arranged advantageously with regard to their preferred current flow direction in relation to the crystal grid, so that the piezo-resistivity of the integrated resistors shows a dependence on a preferred direction, which can be freely determined. The resistor elements (L resistor arrangement) proposed there, which consist of two subresistors arranged in 90° angle to each other, are sensitive to the sum of the normal stress components in the chip surface, wherein, additionally, some circuit-technological equivalents to the L-resistor arrangements are shown in DE 101 54 497 A1, which have the desired piezo-sensitivity.
With regard to the stress dependence of the operating parameters of semiconductor sensors, it has to be noted that not only the semiconductor sensors themselves depend on mechanical stress acting on the semiconductor substrate, but that also their supply voltage or supply current, respectively, which is generated on the semiconductor substrate, has a stress dependence. Thus, it is desirable, for example for Hall sensors, that the Hall sensor is fed with current that is as constant as possible. Voltages can be generated mostly stress-independent via known bandgap circuit principles, the temperature dependence of the generated voltages can even be freely determined within broad limits. Currents which, among other things, serve to supply Hall sensors, are generated by a voltage drop across a resistor implanted on the semiconductor substrate, and thus the currents across the piezo-resistivity of the resistors are also stress-dependent.
The so-far unpublished patent application with the file number DE 10 2004003853.8 describes a semiconductor circuit, two subcurrents in a ratio 1:1.694 are obtained from a p- and n-doped diffusion/implantation resistor, which are laid out in the shape of an L, wherein these subcurrents are subsequently subtracted and the difference of the subcurrents is used as supply current of an n-doped Hall probe in {100} silicon. This semiconductor circuit achieves that the piezo-resistive effect in the two resistors, and thus the supply current mostly cancels out with the piezo-Hall effect of the Hall probe, so that the magnetic overall sensitivity of the semiconductor circuit is mostly independent of mechanical stress.
The methods or circuits, respectively, according to the prior art thus aim to measure the mechanical stress on a semiconductor substrate defect and to correct the influence of the mechanical stress on the sensor result with regard to the measured stress and an empirically determined stress dependence of the sensor to be compensated. On the other hand, the methods aim to develop circuits, which can provide the operating currents and supply voltages of semiconductor sensors independent of mechanical stress, so that the measurement result is not corrupted merely by varying the operating parameters of the sensor.
Here, the high temperature-dependence of the resistances of integrated resistors generally represents a great problem, which has to be considered to determine the mechanical stress with resistors, as it is partly the case in the above cited references, or to characterize a current generated via resistor circuits with regard to its temperature behavior.
Based on a calculation example for the measurement accuracy of an n-doped Hall probe, the problem will be illustrated briefly below. Since integrated resistors generally have distinct temperature dependences, care has to be taken that the small changes of the resistors due to mechanical stress can be distinguished from the comparatively higher changes of the resistors due to temperature. A small n-doped Hall probe in {100} silicon, for example, changes its current-related sensitivity by 1%, when the sum of the normal stress components, which means the mechanical stress, in the silicon surface changes at the position of the probe by 22 MPA. Thereby, with this mechanical stress, the resistor of a p-doped L-resistor arrangement changes by 0.06%, the one of an n-doped L-resistor arrangement by −0.54%. Thus, the difference between a first current through the p-doped resistor and a second current through the n-doped resistor changes by 0.6%. Thus, there is a problem, for example in that the Hall probe which is to be compensated with regard to stress drift, is almost twice as sensitive to mechanical stress than the stress sensor itself, which consists of n-and p-resistors. Additionally, there are the high temperature dependences of the n- and p-resistors. The temperature coefficients which indicate the relative resistor change in dependence on the temperature, lie between 0.25/° C. and 0.5%/° C. with the p- and n-resistors. Thus, a temperature change of 1 to 2° C. is sufficient to change the resistors by 0.6%, a change which corresponds to the selected stress change of 22 MPA, which cannot be distinguished from a “real” stress change without appropriate measures.
Since, according to the prior art, a mechanical stress on a semiconductor substrate is determined via implanted resistors of different types (n- and p-type), it becomes evident by the above calculating example that the temperature dependence of the implanted resistors has to be considered in stress determination, to obtain a relative measurement accuracy of a sensor circuit, which may satisfy the requirements of the desired application. At present, a relative measurement accuracy of 1% may be required with Hall sensors. The temperature dependence of the resistor of an implanted n- or p-type resistor is so high that even small deviations from an idealized assumed temperature behavior of the resistors could already cause that the measurement result of an integrated semiconductor circuit comprising a sensor may no longer fulfill the accuracy requirements made on the measurement result.
The method or circuit, respectively, proposed in unpublished patent application DE 102004003853.8, which partly compensates a stress-induced change of the sensitivity of a Hall probe by an appropriate change of the supply current of the Hall probe, has the disadvantage that the system is, on the one hand, difficult to characterize and thus to align (particularly when the piezo-compensation is to be performed across a wide temperature range), and that, on the other hand, it effects an insufficient compensation with scatterings of the temperature coefficients of the layer resistors of both resistor types (an n- and p-type).
The integrated semiconductor arrangement and the method for generating a pressure-dependent signal proposed in EP 1 496 344 A2 generates an output signal, which is stress independent, but still dependent on the temperature. There, it is not realized that the remaining temperature dependence represents a large problem that has to be controlled for piezo-compensation. Particularly, there is no realization that this temperature-dependence comprises process-induced scattering, which leads to an error term in stress determination.